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LTC3524 1 3524f typical application features applications description adjustable tft bias supply with wled driver the ltc ? 3524 is an integrated bias and white led power converter solution for small/medium-sized polysilicon thin ? lm transistor (tft) liquid crystal (lcd) display panels. the device operates from a single lithium-ion/polymer battery or any voltage source between 2.5v and 6v. a 1.5mhz synchronous boost converter generates a pro- grammable low noise, high ef? ciency 25ma tft supply of up to 6.0v. regulated, low ripple charge pumps are used to generate up to +20v and C20v at 2ma. output sequencing is internally controlled to insure proper initialization and rapid discharge of the lcd panel in shutdown. a second 1.5mhz boost converter powers one or two led strings with up to ? ve series elements each. led current and display brightness can be controlled over a wide range using analog or digital means up to 25ma. the LTC3524 is offered in the 4mm 4mm 24-pin qfn package, minimizing the total solution footprint. +5v, C7.5v, +12.5v, 8 led power supply generates three adjustable, low noise rails for small/medium tft displays drives up to ten white leds led dimming and open-circuit protection controlled power-up/power-down sequencing 1.5mhz fixed frequency, low noise operation v in range 2.5v to 6v, v out range 3v to 6v tft supply ef? ciency up to 90% led supply ef? ciency up to 78% two independantly enabled led strings 200 to 1 true color pwm tm dimming tiny external solution 24-lead qfn package (4mm 4mm 0.75mm) pdas, palmtop computers digital still and video cameras handheld gps portable instrument displays portable media players lcd bias and led ef? ciency v in = 3.6v, v out = 5v, 8 leds 0.1 f ?.5v 2ma 10 f 3.3 h 10 h 0.1 f 3524 ta01a sw2 v in v in v out v out fbvo vnin v2x c 2 + c 2 vh sw1 li-ion vled led2 led1 prog eled2 eled1 elcd vn fbn fbh c n + c h c h + gnd 100k for 20ma 470k 1m + 324k 220k 10 f 0.1 f 1m +5v 25ma +12.5v 2ma +10v 0.47 f 2m 0.47 f LTC3524 2.2 f 0.47 f v out or led string current (ma) 5 efficiency (%) 80 90 25 3524 ta01b 70 60 10 15 20 100 lcd led v in = 3.6v , lt, ltc and ltm are registered trademarks of linear technology corporation. true color pwm is a registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners.
LTC3524 2 3524f pin configuration electrical characteristics absolute maximum ratings v in , sw1, v out , c2 ? ....................................... ? 0.3 to 7v elcd, eled1, eled2, prog ......................... ? 0.3 to 7v fbn, fbh, fbvo ............................................. ? 0.3 to 7v v2x, c2 + , ch ? .............................................. ? 0.3 to 13v led1, led2, vled, sw2 ............................. ? 0.3 to 22v vn in , vh, ch + , cn + ...................................... ? 0.3 to 21v vn .............................................................. ? 21 to +0.3v operating temperature range (note 2) ...? 40c to 85c storage temperature range ...................? 65c to 125c (referred to gnd) parameter conditions min typ max units input voltage range o 2.5 6.0 v v in quiescent supply current lcd elcd = 1.5v, eled1,2 = gnd 200 a v in quiescent supply current led elcd = gnd, eled1,2 = 1.5v (led1 and led2 open) 4m a v out quiescent supply current lcd elcd = 1.5v, eled1,2 = gnd 250 a v in quiescent current shutdown elcd = eled1,2 = gnd .02 2 a switching frequency led and lcd boosts 1 1.5 2 mhz maximum duty cycle led and lcd boosts 85 94 % v out boost regulator fbvo regulation voltage o 1.20 1.225 1.25 v v out adjust range see note 3 3.0 6.0 v 24 23 22 25 21 20 19 7 8 9 top view uf package 24-lead (4mm 4mm) plastic qfn 10 11 12 6 5 4 3 2 1 13 14 15 16 17 18 elcd v in fbvo v out sw1 c2 e led2 ch e ch + vh fbh fbn eled1 prog eled2 sw2 vled led1 c2 + v2x vn in cn + nc vn t jmax = 125c,
LTC3524 3 3524f note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTC3524e is guaranteed to meet speci? cations from 0c to 85c. speci? cations over the C40c to 85c operating temperature range are assured by design, characterization, and statistical process controls. parameter conditions min typ max units switch current limit 100 150 ma charge pumps v2x output voltage load on v2x = 250a 10 v output impedance v2x flying capacitors = 0.1f 250 1 v2x maximum operating voltage (note 3) 12 v vh output voltage (quadrupler) load = 250a (fbh = 1v) 20 v output impedance (2x + quadrupler) flying capacitors = 0.1f 1200 1 fbh regulation voltage 1.15 1.225 1.30 v vh maximum operating voltage (note 3) 20 vn output voltage load on vn = 250a, vn in = 10.2v, external schottkys C9.7 v fbn regulation voltage 0.94 1 1.06 v output impedance vn (2x + vn) flying capacitor = 0.1f 650 1 vn minimum operating voltage (note 3) C20 v switching frequency charge pumps 94 khz v2x to vn delay (note 4) 2 ms vn to vh delay (note 4) 2 ms led boost led1,2 current accuracy r prog = 100k 18 20 22 ma sw2 maximum current limit 500 700 ma sw2 v cesat i sw = 350ma 350 mv logic inputs eled1, eled2 , elcd thresholds 0.4 0.8 1.2 v electrical characteristics the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are t a = 25c. v in = 3.6v, v out = 5.1v, t a = 25c, unless otherwise noted. note 3: speci? cation is guaranteed by design and not 100% tested in production. note 4: measured from point at which vn crosses Cv out to point at which ch + starts switching.
LTC3524 4 3524f temperature ( c) ?0 voltage (v) 5.5 6.0 6.5 35 85 5.0 4.5 4.0 ?5 10 60 7.0 7.5 8.0 3524 g10 |vn| vh/2 v out vn = 0ma vn = 2ma vh load current (ma) 0 vh voltage (v) 18 19 17 16 0.5 1 1.5 2 20 3524 g07 vn = 1ma vn load current (ma) 0 7.0 vn voltage (v) 7.5 8.0 8.5 9.0 9.5 10.0 0.5 1 1.5 2 3524 g09 vh = 0ma vh = 2ma vh = 1ma v in (v) 2.5 current (ma) 19.5 20.0 20.5 4 5 19.0 18.5 18.0 3 3.5 4.5 21.0 21.5 22.0 3524 g05 5 leds 4 leds 3 leds 2 leds per string: v2x load current (ma) 0 v2x voltage (v) 3 5 9.5 9.0 8.5 12 4 10.0 3524 g06 v out current (ma) 010 50 efficiency (%) 70 100 20 40 50 60 90 80 30 60 70 3524 g01 v in = 5 v in = 4.2 v in = 3.6 v in = 3.1 v in = 2.5 l = 10 h v out = 5v v in (v) 2.5 efficiency (%) 75 80 4.5 70 65 3 3.5 4 5 85 3524 g02 5 leds 4 leds 3 leds 2 leds per string: l = 4.7 h led current (ma) 5 55 efficiency (%) 60 65 70 75 8 0 8 5 10 15 20 25 3524 g03 v in =5 v in = 4.2 v in = 3.6 v in = 3.1 v in = 2.5 l = 4.7 h v in (v) 2.5 current (ma) 19.5 20.0 20.5 4 5 19.0 18.5 18.0 3 3.5 4.5 21.0 21.5 22.0 3524 g04 5 leds 4 leds 3 leds 2 leds per string: typical performance characteristics lcd boost ef? ciency vs load current led ef? ciency vs v in 4 leds per string ef? ciency vs v in and led current led1 string current vs v in and number of leds led2 string current vs v in and number of leds v2x output voltage vs v2x load current vh voltage vs vh and vn load current (fbh = 0v) vn voltage vs vn and vh load current (fbn = 1.3v) v out , |vn|, and vh/2 regulation overtemperature t a = 25c, unless otherwise noted.
LTC3524 5 3524f typical performance characteristics lcd bias sequencing lcd bias sequencing sw1 voltage and 10h inductor current at 25ma load sw1 voltage and 10h inductor current at 5ma load sw2 voltage and 4.7h inductor current at 20ma led initial start-up waveforms led burst dimming waveforms led1 and sw2 led burst dimming waveforms led2 and vled 5ms/div 3524 g11 vh vn v out v2x 5v/div 5ms/div 3524 g12 vh vn v out i lcd boost inductor current 5v/div 200ma/div 200ns/div 3524 g13 i lcd boost inductor current 50ma/div sw1 2v/div 3524 g14 200ns/div i lcd boost inductor current 50ma/div sw1 2v/div 3524 g15 200ns/div i lcd boost inductor current 200ma/div sw2 200mv/div sw2 5v/div 50 s/div 3524 g16 i led boost inductor current v led led2 led1 5v/div 500mv/div 500 s/div 3524 g17 i led boost inductor e led1 and e led2 led1 sw2 10v/div 10v/div 12v 200ma/div 5v/div 3524 g18 i led boost inductor e led1 and e led2 v led led2 500 s/div 10v/div 10v/div 12.5v 12v 200ma/div 5v/div t a = 25c, unless otherwise noted.
LTC3524 6 3524f pin functions v in (pin 2): common input supply for lcd bias and white led boost converters. this pin must be locally bypassed with a minimum of 2.2f. gnd/exposed pad (pin 25): signal and power ground for the LTC3524. provide a short, direct pcb path between gnd and the (C) side of the boost (v out , vled) ? lter capaci- tors, and the (C) side of the charge pump outputs (v2x, vh, vn) ? lter capacitors. pcb ground must be soldered to the exposed pad for proper operation. elcd (pin 1): enable input for the LTC3524s lcd cir- cuits. lcd bias supplies are actively discharged to gnd when elcd is low through internal pull down devices. an optional rc network on elcd provides a slower ramp-up of the lcd boost converter inductor current during start- up (soft-start). shutdown mode is activated by driving elcd, eled1, and eled2 low. shutdown disables all ic functions and reduces quiescent current from the battery to less than 2a. fbvo (pin 3): feedback pin for the v out switcher. refer- ence voltage is 1.225v. connect resistive divider tap here with minimum trace area. v r r see block diagram out =+ ? ? ? ? ? ? 1 225 1 1 2 .( ) v out (pin 4): main output of the lcd boost regulator and input to the voltage doubler (2x) stage. bypass v out with a low esr, esl ceramic capacitor (x5r type) between 4.7 and 22f. sw1 (pin 5): synchronous boost switch. connect a 4.7h-15h inductor between sw1 and v in . keep pcb trace lengths as short and wide as possible to reduce emi and voltage overshoot. if the inductor current falls to zero, the pmos synchronous recti? er is turned off to prevent reverse charging of the inductor and an internal switch connects sw1 to v in to reduce emi. c2 C (pin 6): charge pump doubler ? ying capacitor negative node. the charge pump doubler ? ying capacitor is con- nected between c2 + and c2 C . the voltage on c2 C will alter- nate between gnd and v out at an approximate 50% duty cycle while the charge pump is operating. use a 0.1f x5r type ceramic capacitor for best results. lcd bias pin functions c2 + (pin 7) : charge pump doubler ? ying capacitor posi- tive node. the charge pump doubler ? ying capacitor is connected between c2 + and c2 C . the voltage on c2 + will alternate between v out and v2x at an approximate 50% duty cycle while the charge pump is operating. use a 0.1f x5r type ceramic capacitor for best results. v2x (pin 8): charge pump doubler output and input to the charge pump quadrupler. this output generates 2x v out . v2x should be bypassed to gnd with a 0.47f x5r type ceramic capacitor. c2 + and c2 C should be left open and v2x connected to v out if the doubler is not needed to generate vh or vn. vn in (pin 9): positive voltage input for the charge pump inverter. the charge pump inverter can generate a regu- lated negative voltage up to the voltage applied to vn in . connect vn in to v out , v2x, or vh. if vn in is connected to vh, external diodes and a capacitor are required for sequencing (see the applications information section). cn+ (pin 10): charge pump inverter flying capacitor positive node. the charge pump inverter ? ying capacitor is connected between cn + and external schottky diodes (see typical application ? gures). the voltage on cn + will alternate between gnd and vn in at an approximate 50% duty cycle while the inverting charge pump is operating. use a 0.1f x5r type ceramic capacitor for best results. nc (pin 11): no connect. this pin should be connected to gnd. vn (pin 12): negative charge pump converter output. vn can be regulated down to approximately Cvn in volts depending on where vn in is connected. vn should be bypassed to gnd with at 0.47f or larger x5r type ce- ramic capacitor.
LTC3524 7 3524f lcd bias pin functions fbn (pin 13): feedback pin for the vn charge-pump output. reference voltage is 1.0v. connect the resistive divider tap between v out and vn here with minimum trace area. vn rv r see block diagram out = ?? () + 61 5 1( ) fbh (pin 14): feedback pin for the vh charge-pump output. reference voltage is 1.225v. connect resistive divider tap here with minimum trace area. vh r r see block diagram =+ ? ? ? ? ? ? 1 225 1 3 4 .( ) vh (pin 15): charge pump quadrupler output. this output can be regulated to 4x v out and is capable of delivering up to 2ma to a load. vh should be bypassed to gnd with a 0.47f x5r type ceramic capacitor. connect v2x to v out for applications requiring a regulated voltage less than 2x v out . ch + (pin 16): charge pump quadrupler flying capacitor positive node. the charge pump quadrupler (4x) ? ying capacitor is connected between ch + and ch C . the voltage on ch + will alternate between v2x and vh at an approximate 50% duty cycle while the charge pump is operating. use a 0.1f x5r type ceramic capacitor for best results. ch C (pin 17): charge pump quadrupler (4x) flying ca- pacitor negative node. the voltage on ch C will alternate between gnd and v2x at an approximate 50% duty cycle while the charge pump is operating. use a 0.1f x5r type ceramic capacitor for best results. white led driver pin functions led2 (pin 18): output for second led string. connect up to ? ve white leds between led2 (anode) and gnd (cathode). for best current matching and ef? ciency use the same number of white leds in both strings. led1 (pin 19): output for first led string. vled (pin 20): output of the led switcher. bypass vled with a low esr, esl ceramic capacitor (x5r type) of at least 1f. keep pcb trace lengths as short and wide as possible to minimize emi and voltage overshoot. sw2 (pin 21): white led boost switch. connect a 3.3- 15h inductor between sw2 and v in . this is the collector of the internal npn power switch. connect an external schottky diode between sw2 and vled. keep pcb trace lengths as short and wide as possible to minimize emi and voltage overshoot. eled2 (pin 22): enable and pwm dimming control input for the led2 string. the led2 string is disabled when this pin is grounded. digital dimming can be implemented by driving the eled2 pin between 0v and >1.2v at low frequency (ie., 500hz). driving elcd, eled1, and eled2 low initiates shutdown mode which disables all ic func- tions and reduces quiescent current from the battery to less than 2a. prog (pin 23): a single resistor (rprog) between prog and gnd sets the current in the led strings. led current in ma is programmed by: iled iled r ma prog 12 210 6 == ? ? ? ? ? ? a 100k resistor programs 20ma in each string. analog dimming can be implemented by connecting a second resistor between prog and a control voltage. eled1 (pin 24): enable and pulse dimming control input for the led1 string. for applications with ? ve or fewer leds, better ef? ciency is achieved by operating a single led string. for example, eled1 = 1, eled2 = 0, led2 left open circuit and the led string connected to led1.
LTC3524 8 3524f block diagram 4.7 h 10 h v out analog dimming enable/pulse dim led2 string enable/pulse dim led1 string lcd bias enable v2x 10 f r2 324k shdn vled sw1 v out v out fbvo fbh 1.225v 1.225v c2 + c2 ch + ch vh v2x v in sw2 r1 1m +5v 2.5v to 6v 4 5 2 21 20 led1 19 led2 18 prog 23 eled2 22 eled1 24 elcd 1 vnin 9 cn + 10 nc 11 vn 12 fbn shdn +10v 8 3 7 6 16 17 r4 220k 10 f shdn out in regulated charge pump quadrupler shdn r3 2m +12.5v r5 470k r6 1m ?.5v 1v 15 14 13 gnd, exposed pad 25 out in regulated charge pump inverter out in charge pump doubler charge pump sequencer shutdown when elcd = eled1 = eled2 = 0v high voltage pwm boost converter rprog oscillator control synchronous pwm boost converter vbest string enable led current sharing ovp 3524 bd
LTC3524 9 3524f operation the LTC3524 is a highly integrated power converter intended for small to medium-sized tft lcd display modules. the part generates the required bias voltages for the lcd panel as well as regulated current for one or two white led backlight strings. the lcd bias and white led boost converters are powered from a common input voltage between 2.5v and 6v and share a 1.5mhz oscil- lator, allowing tiny inductors and capacitors to be used. the lcd bias supply and each white led string can be independently enabled and a low current shutdown mode (<2a) is activated when all outputs are disabled. the lcd bias includes a synchronous pwm boost con- verter that can be programmed between 3.0v and 6.0v. this output (v out ) is used as the main lcd supply and to power three charge pump converters. the charge pump circuits operate at one-sixteenth the boost frequency (about 94khz). the generated output voltages are internally sequenced to insure proper initialization of the lcd panel. a digital shutdown input (elcd) rapidly discharges each generated output voltage to provide a near instantaneous turn-off of the lcd display. the white led driver circuitry consists of a pwm boost converter with an internal low loss npn power switch and external schottky diode. the led boost output (vled) can power as many as ten white leds at up to 25ma. led cur- rent is programmable and current in each string matched with an internal loop. pwm dimming can be implemented through the enable pins (eled1 and eled2) to extend the dimming range of the application. lcd bias boost converter a synchronous boost converter is used to generate the main analog lcd bias supply for the tft display. the converter utilizes current mode control and includes internally set control loop and slope compensation for optimized performance and a simple design. only an inductor, output capacitor and v out programming resis- tors at fbvo are required to complete the design of the 25ma boost. the 1.5mhz operating frequency produces very low output ripple and allows the use of small low pro? le inductors and tiny external ceramic capacitors. the boost converter also disconnects its output from v in during shutdown to avoid loading the input power source. soft-start produces a controlled ramp of the converter input current during start-up, greatly reducing the burden on the input power source. very low operating quiescent current and synchronous operation allow for greater than 90% conversion ef? ciency. soft-start operation provides a gradual increase in the current drawn from the input power source during initial start-up of the lcd bias boost converter. the rate at which the input current will increase is set by two external com- ponents (r ss and c ss ) connected to elcd (refer to figure 2). upon initial application of power the voltage on elcd will increase relative to the time constant r ss c ss . after one time constant, elcd will rise to approximately 63.2% of the voltage on v in . from 0v to approximately 0.65v on elcd, no switching will occur because the threshold is 0.65v (typ). from 0.65v to 1v the maximum switch pin current capability of the LTC3524 will gradually increase from near 0a to the maximum current limit. lcd bias charge pumps the LTC3524 uses three internal charge pump circuits to generate low current, high voltage outputs typically used to bias the lcd gate drive. the three charge pumps include a doubler, quadrupler, and inverting con? guration. each charge pump requires two small external capacitors, one to transfer charge, and one for ? ltering. the charge pumps feature ? xed frequency operation for high ef? ciency and lowest noise performance. the charge pump converters operate at one-sixteenth the boost converter frequency. figure 1. 1ms soft-start with 3.6v v in 3524 f01 elcd v in r ss 1m c ss 6.8nf
LTC3524 10 3524f operation the doubler is internally connected to v out and generates a voltage of approximately 2x v out at v2x. the quadrupler has its input connected to v2x and output to vh. the regu- lated vh voltage is programmed at fbh and can be set to produce a voltage up to 4x v out . the maximum voltage vh can source depends on charge pump loading and the output impedance of the doubler and quadrupler stages (see typical performance characteristics). the inverting charge pump has its input at vn in and output at vn. regulated vn voltage is set at fbn and can be programmed to a minimum negative voltage of vn in minus diode drops. vn in can be connected to v out , v2x, or vh depending on the negative voltage value required for the application. ef? ciency is improved by using the lowest voltage possible on vn in . as with the other charge pump outputs, the maximum negative voltage that vn can maintain will depend on loading. two schottky diodes are required to complete the negative charge pump as shown on the front page and applications circuits. lcd bias sequencing referring to the following text and figure 2, the LTC3524 power-up and discharge sequence is explained. when input power is applied and elcd is active, the boost converter initializes and charges its output towards the ? nal pro- grammed value. when the boost converter output (v out ) has reached approximately 90% of its ? nal value, an internal signal is asserted which allows the charge pump doubler (v2x) to begin operation toward its ? nal goal of 2x v out . approximately 2ms later, the charge pump inverter (vn) begins operation toward its programmed value. when the vn has reached approximately 50% of its ? nal value, a 2ms (nominal) timeout period begins. at the conclusion of the 2ms timeout period, the charge pump quadrupler (vh) is allowed to begin operation. during the initial power-up sequence, the charge pumps run at half speed. if vn in is connected to vh, a diode-or circuit is needed between v2x, vh, and vn in (see the typical applications) to ensure proper sequencing. when elcd is brought low, internal transistors discharge the outputs in an orderly fashion. as shown in figure 2, vn and v2x are initially discharged, followed by vh, fol- lowed by v out . v out must be discharged before the part can enter low current shutdown mode (elcd, eled1, eled2 must be low, as well). white led boost driver the white led driver portion of the LTC3524 consists of a nonsynchronous, ? xed frequency, current mode boost converter that generates the voltage required for one or two led strings. the converter has an internal feedback loop and slope compensation circuitry, reducing external components and simplifying the design. as with the lcd bias boost converter, the 1.5mhz operation allows tiny external components to be used. the boost converter figure 2. lcd power-up and power-down timing diagram v out v out v2x vn vh v2x vh time elcd elcd vn 3524 f02
LTC3524 11 3524f operation output voltage is not set to a ? xed voltage, but rather controlled to produce the programmed current in the led strings. the output (vled) is rated for a maximum of 21v which will support two strings of up to ? ve series led in most cases. the boost output is used to power one or two white led strings with a common ground. if only one string is en- abled (eled1 or eled2) the voltage on that string (led1 or led2) will be controlled to regulate the led current set at the prog pin. the voltage on vled will be slightly greater due to the overhead needed for the internal sense element and share circuitry. for example, a single string application with four white leds programmed at 20ma would require 14.4v on led1 if the forward drop on each led is 3.6v. the voltage on vled may need to be 15v to support the drops on the internal share circuitry. for ap- plications with ? ve or fewer led elements, a single-string operation will provide better ef? ciency. if both strings are enabled, the boost output (vled) will generate the voltage required to regulate current in the higher voltage string. voltage on the lower string is controlled by the internal share circuit to provide the pro- grammed current. the LTC3524 achieves current matching between the strings while minimizing the voltage drop between vled and the higher voltage string (to maintain high ef? ciency). for example, an application with four leds on led1 and ? ve leds on led2 is programmed for 20ma (r prog = 100k). in this instance, assuming a 3.6v forward drop, led1 is 14.4v, led2 is 18v, and vled is 18.6v. the drop between vled and led1 is 4v at 20ma, resulting in lower ef? ciency. for this reason, it is recom- mended when possible to keep the number of leds in each string matched. analog dimming: the LTC3524s white led driver allows both analog and pwm dimming to be implemented. analog dimming provides a lower noise solution but a reduced dynamic range. analog dimming can be implemented by resis- tively summing a current into the prog pin. the led string currents with r prog , v sum , and r sum will be: i v r vv r led prog sum sum =+ ? ? ? ? ? ? ? 1625 1 225 1 225 .. a 0v to 3v v sum with r sum = 300k and r prog = 150k will produce led currents between 3ma and 20ma. true color pwm dimming: pwm dimming can be implemented by enabling and dis- abling the led strings with eled1 and eled2. a pwm frequency between 100hz and 500hz is generally recom- mended to get wide dimming range while operating at a frequency faster than the eye can detect. for best results, the lcd bias portion of the device should be enabled (to keep the device out of shutdown) and eled1 and eled2 should be driven with a common low frequency pwm signal. pwm dimming waveforms are shown in the typical performance characteristics section of this datasheet. the achievable dimming range is dependant on the pwm dimming frequency (f pwm ) and the settling time of the led strings when enabled (t settle ). the minimum duty cycle (or light output) that the strings can be controlled to is given by: minduty = f pwm ? t settle for example, if the settling time is 50s and the pwm frequency is 100hz, the minimum duty cycle is 0.5% which corresponds to a 200:1 dimming range. open led: the LTC3524 has internal over voltage protection in the event that one of the white led strings becomes open circuited. if vled reaches 24v (nominal) due to an open circuit on either string, the boost converter will regulate at 24v while current in the remaining string (if enabled) is controlled to the programmed value. figure 3. analog dimming circuit using v sum 3524 f03 prog v sum 0v ?3v r sum 300k r prog 150k
LTC3524 12 3524f applications information inductor selection 3.3h to 15h inductors are recommended for use with the LTC3524s two boost converters. the synchronous lcd bias boost inductor should have a saturation current (i sat ) rating of at least 150ma, where the nonsynchronous white led boost inductor should have a rating of at least 600ma. in most applications, the inductor value for the lcd bias will be larger (10h to 15h) to prevent opera- tion in deep discontinuous mode. the inductor value for the white led can be smaller (3.3h to 6.8h), since it operates at higher currents. ferrite core materials are strongly recommended for their superior high frequency performance characteristics. inductors meeting these requirements are listed in table 1. the maximum current and dcr ranges in the table correspond to the respec- tive inductance range (for example, the 3.3h inductor table 1. recommended inductors part l ( h) maximum current (ma) dcr ( 1 ) dimensions (mm) (l w h) manufacturer me3220 lp03010 mss4020 3.3-15 3.3-10 3.3-15 1300-700 950-570 1100-440 0.14-0.52 0.2-0.52 0.09-0.33 3.2 2.5 2.0 3.0 3.0 1.0 4.0 4.0 2.0 coil craft www.coilcraft.com sd3112 3.3-15 970-405 0.16-0.65 3.1 3.1 1.2 cooper www.cooperet.com mip3226d 3-10 1000-200 0.1-0.16 3.2 2.6 1.0 fdk www.fdk.com lqh32cn lqh2mc 4.7-15 4.7-15 650-300 300-200 0.15-0.58 0.8-1.6 3.2 2.5 1.5 2 1.6 0.9 murata www.murata.com cdrh3d16 cdrh2d14 3.3-15 3.3-12 1100-520 820-420 0.09-0.41 0.12-0.32 3.8 3.8 1.8 3.2 3.2 1.5 sumida www.sumida.com nr3010 nr3015 3.3-15 3.3-15 750-400 1200-560 0.16-0.74 0.1-0.36 3.0 3.0 1.0 3.0 3.0 1.5 taiyo yuden www.t-yuden.com will have the highest maximum current and lowest dcr). shielded inductor series parts are in bold text . the v in input capacitor should be an x5r type of at least 2.2f using a low impedance connection to the battery. the vled output capacitor should be x5r type and at least 1f for analog dimming and 4.7f for pwm dimming. the v out capacitor should also be an x5r type between 2.2f and 10f. a larger capacitor (10f) should be used if lower output ripple is desired or the output load required is close to the 25ma maximum. the charge pumps require ? ying capacitors (c2 + to c2 C , cn + , and ch + to ch C ) that should be at least 0.1f to obtain speci? ed performance. ceramic x5r types are strongly recommended for their low esr and esl and capacitance vs bias voltage stability. the ? lter capacitors on v2x, vn,
LTC3524 13 3524f and vh should be at least 0.47f. please be certain that the capacitors used are rated for the maximum voltage with adequate safety margin. refer to table 2 for a listing of capacitor vendors. table 2. capacitor vendor information supplier phone website avx (803) 448-9411 www.avxcorp.com murata (714) 852-2001 www.murata.com samsung (408) 544-5200 www.sem.samsung.com taiyo yuden (800) 368-2496 www.t-yuden.com tdk (847) 803-6100 www.component.tdk.com applications information figure 4. suggested layout two layer board (not to scale) printed circuit board layout guidelines high-speed operation of the LTC3524 demands care- ful attention to pcb layout. you will not get advertised performance with a careless layout. figure 4 shows the recommended component placement for a double layer pcb. the bottom layer is used as a common ground plane except for the vn trace. v out layout notes: *keep r prog away from sw2 traces light grey top layer via to bottom ground plane. ground plane fills bottom v in vn component and ic sizes not to scale top view 24 23 22 21 20 19 7 8 9 10 11 12 6 5 1 13 14 15 16 17 18 led2 ch ch + vh fbh fbn eled1 prog eled2 sw2 vled led1 * l2 eled1 eled2 elcd r1 vh gnd gnd gnd gnd gnd white leds schottky diode white leds 4 3 2 c2 + v2x vn in cn + nc vn elcd v in fbvo v out sw1 c2 l1 3524 f04 schottky diode
LTC3524 14 3524f typical applications li-ion to +5v, 25ma, +16v, 1ma, C13v, 1ma tft lcd power supply + 10 white leds v out or led string current (ma) 5 60 efficiency (%) 70 80 90 100 10 15 20 25 3524 ta02b 4.2 3.6 3.1 4.2 3.1 lcd (v in ) led (v in ) 3.6 0.1 f 0.47 f ?3v, 1ma 10 f 0.1 f 3524 ta02a v in v out v2x v out fbvo v2x c 2 + c 2 vh required for lcd bias sequencing when |vn| > v2x +5v, 25ma +10v +16v, 1ma vled led2 led1 prog eled2 eled1 elcd vnin vn fbn fbh c n + c h c h + gnd 100k for 20ma 287k 1m vh 324k 165k 10 f 0.47 f 1m 0.47 f 2m 0.47 f 0.1 f LTC3524 4.7 h 10 h sw2 v in sw1 li-ion + 2.2 f
LTC3524 15 3524f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description uf package 24-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1697) 4.00 0.10 (4 sides) note: 1. drawing proposed to be made a jedec package outline mo-220 variation (wggd-x)?o be approved 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side, if present 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 24 23 1 2 bottom view?xposed pad 2.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 0.50 bsc 0.200 ref 0.00 ?0.05 (uf24) qfn 0105 recommended solder pad pitch and dimensions 0.70 0.05 0.25 0.05 0.50 bsc 2.45 0.05 (4 sides) 3.10 0.05 4.50 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer
LTC3524 16 3524f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2008 lt 0208 ? printed in usa related parts typical application part number description comments lt1942 quad dc/dc converter for triple output tft supply plus led driver v in : 2.6v to 16v, v out(max) = 36v, i q = 7ma, i sd = < 1a, 4mm 4mm qfn-24 package lt1947 3mhz, 30v adjustable output tft-lcd v in : 2.7v to 8v, v out(max) = 30v, i q = 9.5ma, i sd = < 1a, msop-10 package ltc3450 triple switching regulator v in : 1.5v to 4.6v, v out(max) = 15v, i q = 75a, i sd = < 1a, 3mm 3mm qfn-16 package lt3465/lt3465a constant-current, 1.2mhz/2.7mhz high ef? ciency white led boost regulator with integrated schottky diode v in : 2.7v to 16v, v out(max) = 34v, i q = 1.9ma, i sd = < 1a, thinsot tm package lt3466/lt3466-1 dual constant-current, 2mhz, high ef? ciency white led boost regulator with integrated schottky diode v in : 2.7v to 24v, v out(max) = 40v, i q = 5ma, i sd = < 16a, 3mm 3mm dfn-10 package lt3471 dual output, boost/inverter, 1.3a i sw , 1.2mhz, high ef? ciency boost-inverting dc/dc converter v in : 2.4v to 16v, v out(max) = 40v, i q = 2.5ma, i sd = < 1a, 3mm 3mm dfn-10 package lt3491 constant-current, 2.3mhz, high ef? ciency white led boost regulator with integrated schottky diode v in : 2.5v to 12v, v out(max) = 27v, i q = 2.6ma, i sd = < 8a, 2mm 2mm dfn-6 sc70 package lt3494/lt3494a 40v, 180ma/350ma micropower low noise boost converter with output disconnect v in : 2.3v to 16v, v out(max) = 40v, i q = 65a, i sd = < 1a, 3mm 2mm dfn-8 package lt3497 constant-current, 2.3mhz, dual high ef? ciency white led boost regulator with integrated schottky diode for 12 leds v in : 2.5v to 10v, v out(max) = 32v, i q = 6ma, i sd = < 12a, 3mm 2mm dfn-10 package lt3591 constant-current, 1mhz, high ef? ciency white led boost regulator with integrated schottky diode v in : 2.5v to 12v, v out(max) = 40v, i q = 4ma, i sd = < 9a, 3mm 2mm dfn-8 package thinsot is a trademark of linear technology corporation. 3nimh or nicd to +3.3v, 25ma, +10v, 1ma, C5v, 1ma tft lcd power supply + 6 white leds 0.1 f philips pmeg3005 10 f 0.1 f 3524 ta03a v2x v in v out fbvo v2x c 2 + c 2 vh 3 nimh or nicd vled led2 led1 prog eled2 eled1 elcd vnin vn fbn fbh c n + c h c h + gnd + 301k 165k 10 f 510k 0.47 f 2m 0.47 f 0.1 f LTC3524 v out 232k 5v, 1ma +10v, 1ma +3.3v, 25ma +6.6v 604k 0.47 f coilcraft mss4020 series 100k for 20ma 4.7 h 10 h sw2 v in sw1 2.2 f 5 50 efficiency (%) 60 70 80 90 100 10 15 20 25 3524 ta03b v out or led string current (ma) 3.1v 2.5v 2.5v 3.6v lcd (v in ) led (v in ) 3.1v 3.6v lcd (v in )

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